In standards such as 100G and 400G defined by the Institute of Electrical and Electronics Engineers (IEEE), transmission by PAM4 signals is regulated rather than transmission by conventional PAM2 (Non Return to Zero: NRZ) signals in order to cope with ultrahigh speed of bit rates.
As shown in Patent Document 1, for example, the PAM4 signal can be generated as a four-valued signal of 0(00), 1(01), 2(10), and 3(11) by generating the most significant bit signal stream MSB and the least significant bit signal stream LSB by using two signal sources and adding these signals.
However, when considering simulation of a bit error due to influence of signal deterioration or the like in the physical layer, only value transition of 0→1 or 1→0 in the conventional NRZ signal is performed, so it is possible to simulate bit errors only by inverting the bits at the last stage of the signal generating device.